Computation Structures
Developed as the text for the basic computer architecture course at MIT, Computation Structures integrates a thorough coverage of digital logic design with a comprehensive presentation of computer architecture. It contains a wealth of information for those who design computers or work with computer systems, spanning the entire range of topics from analog circuit design to operating systems. Ward and Halstead seek to demystify the construction of computing hardware by illustrating...
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Developed as the text for the basic computer architecture course at MIT, Computation Structures integrates a thorough coverage of digital logic design with a comprehensive presentation of computer architecture. Booknews This is the textbook for a one-term sophomore course required of electrical engineering and computer science majors at MIT. It approaches digital systems architecture through a bottom-up progression from simple electronics into representative computer systems. Annotation c. Book News, Inc., Portland, OR (booknews.com)
Preface1 The Digital Abstraction1.1 Information and the Digital Abstraction1.2 Representation of Discrete Variables1.3 Combinational Devices1.4 The Static Discipline: Logic Levels1.5 Rate of Information Flow1.6 Transitions and Validity1.7 Logic Families1.8 DigitalCircuit Implementation1.9 Summary1.10 ConteXt1.11 Problems2 Binary Representations and Notation2.1 Representation of Numbers2.2 FloatingPoint Representations2.3 Other Representations2.4 HeXadecimal Notation2.5 *Unrepresentable Values2.6 Error Detection and Correction2.7 ConteXt2.8 Problems3 Combinational Devices and Circuits3.1 Boolean Functions and Truth Tables3.2 Elementary Gate Circuits3.3 Synthesis of Logic Circuits3.4 Temporal Considerations in Combinational Circuits3.5 ConteXt3.6 Problems4 Sequences and State4.1 Feedback and State4.2 Latches, FlipFlops, and Registers4.3 EdgeTriggered FlipFlops and Registers4.4 Register Timing4.5 Models of Sequential Circuits4.6 Synchronization and State4.7 ConteXt4.8 Problems5 Synthesis of Digital Systems5.1 Building Blocks for Logic Design5.2 Regular Structures5.3 Design EXample: A Combinational Multiplier5.4 ConteXt5.5 Problems6 FiniteState Machines6.1 Synthesis of FiniteState Machines6.2 Synchronous FSM Circuit Models6.3 States and Bits6.4 *Equivalence of FSMs6.5 *Regular EXpressions and Nondeterministic FSMs6.6 ConteXt6.7 Problems7 Control Structures and Disciplines7.1 Timing Disciplines7.2 Degrees of Synchrony7.3 Constraints on Control Structure7.4 Synchronous GloballyTimed Control7.5 Synchronous Locally Timed Control7.6 Asynchronous Locally Timed Control7.7 ConteXt7.8 Problems8 Performance Measures and Tradeoffs8.1 Pipelining8.2 Systematic Pipeline Construction8.3 CostPerformance Tradeoffs and Options8.4 Implementations of Bubble Sort8.5 More Efficient Sorting Algorithms8.6 Summary8.7 ConteXt8.8 Problems9 Communication: Issues and Structures9.1 Physical Limits and Constraints9.2 Communication Buses9.3 Serial Communication9.4 ConteXt9.5 Problems10 Interpretation10.1 Turing Machines and Computability10.2 Universality10.3 Uncomputable Functions10.4 Interpretation versus Compilation10.5 ConteXt10.6 Problems11 Microinterpreter Architecture11.1 Data Paths versus Control11.2 A Basic DataPath Architecture11.3 Typical DataPath Subsystems and Uses11.4 Control Subsystem11.5 The Control Machine as an Interpreter11.6 ConteXt11.7 Problems12 Microprogramming and Microcode12.1 Microcode Semantics12.2 Symbolic Microprogramming12.3 Microcoding EXamples12.4 Summary12.5 ConteXt12.6 Problems13 SingleSequence Machines13.1 Machine Language as an Abstraction13.2 Gross Organization of the SingleSequence Machine13.3 Influences on MachineLanguage Design13.4 Implementation Considerations13.5 The von Neumann Machine13.6 Perspectives and Trends13.7 ConteXt13.8 Problems14 Stack Architectures: The S Machine14.1 Basic Instructions14.2 SMachine Instruction Coding14.3 *MAYBE Implementation14.4 Compilation Techniques for Stack Machines14.5 Flow of Control on the S Machine14.6 *Relative Addressing and PositionIndependent Code14.7 Stack Frames and Procedure Linkage14.8 *LeXicalScoping Support14.9 Traps14.10 Summary14.11 ConteXt14.12 Problems15 Register Architectures: The G Machine15.1 Addressing Modes15.2 The G Machine15.3 *MAYBE Implementation15.4 Other GeneralRegister Architectures15.5 Procedure Linkage15.6 Register Allocation by Compilers15.7 Traps15.8 HighPerformance Implementation Considerations15.9 Summary15.10 ConteXt15.11 Problems16 Memory Architectures16.1 Locality of Reference and Other Regularities of Memory Access16.2 Interleaved Memory Modules16.3 Instruction Prefetch16.4 TopofStack Cache16.5 Multilevel Memory16.6 Cache Memory16.7 Paging and Virtual Memory16.8 Summary16.9 ConteXt16.10 Problems17 ReducedInstructionSet Computers17.1 Basic Data Pipeline17.2 Pipeline Timing17.3 Interface Issues17.4 InstructionStream Constants17.5 Instruction Fetch and Branch Control17.6 MainMemory Timing Conflict17.7 Impact of Lengthened Pipeline17.8 Alternatives and Issues17.9 Summary17.10 ConteXt17.11 Problems18 Processes and Processor MultipleXing18.1 The Process Abstraction18.2 Process Management18.3 OperatingSystem Services18.4 Memory Mapping18.5 Protection18.6 Summary18.7 ConteXt18.8 Problems19 Process Synchronization19.1 ProcessSynchronization Constraints19.2 Semaphores and Precedence Constraints19.3 Semaphores for Precedence19.4 Semaphores for Mutual EXclusion19.5 ProducerConsumer Synchronization19.6 Binary Semaphores19.7 Implementing Semaphores19.8 Deadlock19.9 Summary19.10 ConteXt19.11 Problems20 Interrupts, Priorities, and Real Time20.1 MutualEXclusion Requirements20.2 Enable/Disable Mechanism20.3 Interrupts and Stack Discipline20.4 Implementation of Interrupts20.5 Weak Priorities20.6 Processor Priorities20.7 Scheduling and Priority Assignments20.8 Summary20.9 ConteXt20.10 Problems21 Architectural Horizons21.1 Models of Computation21.2 The Multiprocessor Challenge21.3 TaXonomy of Multiprocessors21.4 Hiding Parallelism: Concurrent SSM EXecution21.5 Data Parallelism21.6 Other SIMD Approaches21.7 SharedMemory Multiprocessors21.8 Distribution of Subcomputations21.9 Summary21.10 ConteXtA1 The C Language: A Brief OverviewA1.1 Simple Data Types and DeclarationsA1.2 EXpressionsA1.3 Statements and ProgramsA1.4 Arrays and PointersA1.5 StructuresA2 MAYBE Microarchitecture SummaryA2.1 ControlROM Bit FieldsA2.2 Circuit DetailsA2.3 Microinstruction SetA2.4 ControlROM ListingA2.5 Macro Definitions for MicroinstructionsA3 MAYBE Microcode Support for InterpretersA3.1 Switch ConsoleA3.2 MicrosubroutinesA4 S Machine SummaryA4.1 InstructionSet DetailsA4.2 Language DefinitionA4.3 Sample SMachine ProgramA4.4 Complete MAYBE SMachine MicrocodeA5 G Machine SummaryA5.1 InstructionSet DetailsA5.2 Language DefinitionA5.3 Sample GMachine ProgramA5.4 Complete MAYBE GMachine MicrocodeBibliographyIndeX
\ BooknewsThis is the textbook for a one-term sophomore course required of electrical engineering and computer science majors at MIT. It approaches digital systems architecture through a bottom-up progression from simple electronics into representative computer systems. Annotation c. Book News, Inc., Portland, OR (booknews.com)\ \
