The Microarchitecture of Pipelined and Superscalar Computers
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The Microarchitecture of Pipelined and Superscalar Computers provides an authoritative treatment of the implementation (i.e. microarchitecture) of computer architectures. The subject matter covered is the collection of techniques that are used to achieve the highest performance in single-processor machines; these techniques center the exploitation of low-level parallelism (temporal and spatial) in the processing of machine instructions. The book gives a coherent picture of caches, pipelines and their control, and branch prediction. It is the first such publication to treat these topics together. The Microarchitecture of Pipelined and Superscalar Computers covers the fundamentals of the subject by outlining the general principles and ideas. These are then demonstrated by selected case studies taken from practical machines. The Microarchitecture of Pipelined and Superscalar Computers has been specifically developed as a textbook for advanced undergraduate or graduate level instruction. It also makes an invaluable reference for microprocessor design engineers and those seeking to pursue research in the area.
PrefaceAcknowledgments1Fundamentals of Pipelining12Timing and Control of Pipelines313High-Performance Memory Systems474Control Flow: Branching and Control Hazards835Data Flow: Detecting and Resolving Data Hazards1516Vector Pipelines1857Interrupts and Branch Mispredictions219Bibliography243
