Quality Conformance and Qualification of Microelectronic Packages and Interconnects
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All packaging engineers and technologists who want to ensure that they give their customers the highest quality, most cost-effective products should know that the paradigm has shifted. It has shifted away from the MIL-STDs and other government standards and test procedures that don't cost-effectively address potential failure mechanisms or the manufacturing processes of the product. It has shifted decisively towards tackling the root causes of failure and the appropriate implementation of cost-effective process controls, qualityscreens, and tests. This book's groundbreaking, science-based approach to developing qualification and quality assurance programs helps engineers reach a new level of reliability in today's high-performance microelectronics. It does this with powerful... * Techniques for identifying and modeling failure mechanisms earlier in the design cycle, breaking the need to rely on field data * Physics-of-failure product reliability assessment methods that can be proactively implemented throughout the design and manufacture of the product * Process controls that decrease variabilities in the end product and reduce end-of-line screening and testing A wide range of microelectronic package and interconnect configurations for both single-and multi-chip modules is examined, including chip and wire-bonds, tape-automated (TAB), flip-TAB, flip-chip bonds, high-density interconnects, chip-on-board designs (COB), MCM, 3-D stack, and many more. The remaining package elements, such as die attachment, case and lid, leads, and lid and lead seals are also discussed in detail. The product of a distinguished team of authors and editors,this book's guidelines for avoiding potential high-risk manufacturing and qualification problems, as well as for implementing ongoing quality assurance, are sure to prove invaluable to both students and practicing professionals. For the professional engineer involved in the design and manufacture of products containing electronic components, here is a comprehensive handbook to the theory and methods surrounding the assembly of microelectronic and electronic components. The book focuses on computers and consumer electronic products with internal subsystems that reflect mechanical design constraints, cost limitations, and aesthetic and ergonomic concerns. Taking a total system approach to packaging, the book systematically examines: basic chip and computer architecture; design and layout; interassembly and interconnections; cooling scheme; materials selection, including ceramics, glasses, and metals; stress, vibration, and acoustics; and manufacturing and assembly technology. 1994 (0-471-53299-1) 800 pp. INTEGRATED CIRCUIT, HYBRID, AND MULTICHIP MODULE PACKAGE DESIGN GUIDELINES: A Focus on Reliability —Michael Pecht This comprehensive guide features a uniquely organized time-phased approach to design, development, qualification, manufacture, and in-service management. It provides step-by-step instructions on how to define realistic system requirements, define the system usage environment, identify potential failure modes, characterize materials and processes by the key control label factors, and use experiment, step-stress, and accelerated methods to ensure optimum design before production begins. Topics covered include: detailed design guidelines for substrate...wire and wire, tape automated, and flip-chip bonding...element attachment and case, lead, lead and lid seals—incorporating dimensional and geometric configurations of package elements, manufacturing and assembly conditions, materials selection, and loading conditions. 1993 (0-471-59446-6) 454 pp. Booknews For quality control personnel, reliability engineers, and package designers, addresses the role of failure-mechanism identification and modeling as a science-based approach to developing a qualification and quality conformance program. The various chapters present the major packages and interconnect elements in a sequence compatible with the information flow for design assessment, manufacturing quality conformance, and qualification. Wherever feasible, potential high-risk manufacturing and qualification problems are emphasized, as well as issues associated with ongoing quality assurance. Annotation c. Book News, Inc., Portland, OR (booknews.com)
ForewordForewordPrefaceList of Acronyms1Introduction12Three-dimensional Stacked Dies173Cofired Ceramic Substrates374Organic Laminated Substrates and Chip-on-board715High-density Interconnects and Deposited Dielectrics956Wire and Wirebonds1257Tape Automated Bonds1638Flip-chip Bonds2079Device and Substrate Attachment23710Cases26111Leads29512Lead Seals31713Lid Seals34114Material and Product Evaluation Methods35915Rework Methods403Bibliography419Index451
